Cirrus Logic EP93xx User Manual
Page 438
10-44
DS785UM1
Copyright 2007 Cirrus Logic
DMA Controller
EP93xx User’s Guide
1
0
1
0
10
Bit Descriptions:
SAR_CURRENTx: Returns the current value of the channel source address
pointer. Upon writing the BCRx register, the contents of the
SAR_BASEx register is loaded into the SAR_CURRENTx
register and the x buffer becomes active. Following
completion of a transfer from a buffer, the post-
incremented address is stored in this register so that a
software service routine can detect the point in the buffer
at which transfer was terminated.
DAR_CURRENTx
Address:
DAR_CURRENT0: Channel Base Address + 0x0044 - Read Only
DAR_CURRENT1: Channel Base Address + 0x003C - Read Only
Definition:
This is the Channel Current Destination Address Register.
Bit Descriptions:
DAR_CURRENTx: Returns the current value of the channel destination
address pointer. Upon writing the BCRx register the
contents of the DAR_BASEx register is loaded into the
DAR_CURRENTx register and the x buffer becomes
active. Following completion of a transfer from a buffer, the
post-incremented address is stored in this register so that
a software service routine can detect the point in the buffer
at which transfer was terminated.
DMAGlInt
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DAR_CURRENTx
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DAR_CURRENTx
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0