Maverickcrunch co-processor, 1 introduction, 1 features – Cirrus Logic EP93xx User Manual
Page 71: 2 operational overview, Chapter 3. maverickcrunch co-processor -1, 1 introduction -1, 1 features -1 3.1.2 operational overview -1, Chapter 3

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Copyright 2007 Cirrus Logic
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Chapter 3
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MaverickCrunch Co-Processor
3.1 Introduction
Note:This chapter applies only to the EP9302, EP9307, EP9312, and EP9315 processors.
The MaverickCrunch co-processor accelerates IEEE-754 floating point arithmetic and 32-bit
and 64-bit fixed point arithmetic operations. It provides an integer multiply-accumulate (MAC)
that is considerably faster than the native MAC implementation in the ARM920T. The
MaverickCrunch co-processor significantly accelerates the arithmetic processing required to
encode/decode digital audio formats.
The MaverickCrunch co-processor uses the standard ARM920T co-processor interface,
sharing its memory interface and instruction stream. All MaverickCrunch operations are
simply ARM920T co-processor instructions. The co-processor handles all internal inter-
instruction dependencies by using internal data forwarding and inserting wait states.
3.1.1 Features
Key features include:
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IEEE-754 single and double precision floating point
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32/64-bit integer
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Add/multiply/compare
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Integer Multiply-Accumulate (MAC) 32-bit input with 72-bit accumulate
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Integer Shifts
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Floating point to/from integer conversion
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Sixteen 64-bit registers
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Four 72-bit accumulators
3.1.2 Operational Overview
The MaverickCrunch co-processor is a true ARM920T co-processor. It communicates with
the ARM920T via the co-processor bus and shares the instruction stream and memory
interface of the ARM920T. It runs at the ARM920T core clock frequency (either FCLK or
BCLK).
The co-processor supports four primary data formats: