Cirrus Logic EP93xx User Manual
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DS785UM1
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
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If the LUT is enabled, the pixel data is passed to the LUT. The new pixel data value will
be used to index into the LUT. The value at that index location will be passed on to the
Color Mux.
Non LUT Blink:
If the LUT is not enabled, the modified pixel data is moved directly into the Color Mux.
This new pixel value is used by the Color Mux as the 'new' value for the blinking pixel.
0010 - OR Blinking:
The pixel data is ORed with the BlinkMask register. The modified pixel data will continue
through the pipeline. See AND blinking for details on the differences between LUT and
non-LUT blinking.
0011 - XOR Blinking:
The pixel data is XORed with the
register. The modified pixel data will
continue through the pipeline. See AND blinking for details on the differences between
LUT and non-LUT blinking.
0100 - Background Blinking:
The pixel data is replaced with the value in the
register and the new
pixel value is placed into the pipeline and sent to the Color Mux.
0101 - Offset Single Blinking:
The pixel data is manipulated by adding the value of the
register with
the pixel data. The resulting pixel data will be placed into the pipeline and then sent to
the Color Mux.
0110 - Offset 888 Blinking:
The 24 bits of data is made up of three 8-bit values that represent the RGB colors. This
mode will treat each of the 8 bit values as a single value, and apply the blinking rules
defined for the Offset Single Blinking mode.
The
value is itself treated as an 888 pixel where each of the
corresponding 8 bits represent the value that will be added to the corresponding color.
0111 through 1011 - Not used
1100 - Dim Single Blinking:
The pixel that is identified as a blinking pixel is manipulated:
1.The LSB is dropped
2.The remaining bits are shifted right by one
3.The MSB is set to ‘0’
1101 - Bright Single Blinking:
The pixel that is identified as a blinking pixel is manipulated: