Figure 7-10. interlaced video signals -30, Figure 7-10, "interlaced video, Signals – Cirrus Logic EP93xx User Manual
Page 212
7-30
DS785UM1
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
7
7
Figure 7-10. Interlaced Video Signals
Horizontal Back
Porch
Horizontal Front
Porch
Horizontal Active
Video
LINECARRY (CLKS)
VLINESTOTAL
VACTIVESTRT
VSYNCn
VACTIVE
HSYNCn
HACTIVE
0h
0h
1h
VLINESTOTAL
VLINESTOTAL
Vertical
down
counter
0h
0h
1h
HCLKSTOTAL
HCLKSTOTAL
HCLKSTOTAL -1
Horizontal
down
counter
VSYNCSTART
VSYNCSTOP
SPCLK
DURING
Vertical
VCLKSTRT
VCLKSTOP
HACTIVESTRT
HACTIVESTOP
HSYNCSTART
HSYNCSTOP
HCLKSTOP
HCLKSTART
SPCLK
DURING
Horizontal
VBLANKn
VBLANKSTOP
VBLANKSTRT
HBLANKn
HBLANKSTRT
HBLANKSTOP
VACTIVESTOP
VLINESTOTAL/2
CURSORDSCANHYLOC
HSIGSTOP
HSIGSTRT
VSIGSTOP
VSIGSTRT
FIELD0
FIELD1
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