Pccommon – Cirrus Logic EP93xx User Manual
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DS785UM1
Copyright 2007 Cirrus Logic
Static Memory Controller
EP93xx User’s Guide
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The data strobe assertion time is specified by (AA+1)
HCLK cycles. For example, if AA = 0x10, the data strobe
assertion time is 16 + 1 = 17 cycles of HCLK
HA:
Attribute space Hold time - Read/Write
The value written to this field specifies the minimum
‘number of HCLK cycles, minus 1’ between de-asserting
the data strobe, MCDAENn
,
and de-asserting the address
strobe, MCADENn.
The Hold time is specified by (HA +1) HCLK cycles. For
example, if HA = 0xC, the Hold time is 12 + 1 = 13 cycles
of HCLK.
PA:
Attribute space setup time - Read/Write
The value written to this field specifies the ‘number of
HCLK cycles, minus 1’ that the address strobe,
MCADENn, is set up before assertion of the data strobe,
MCDAENn.
The Setup time is specified by (PA+1) HCLK cycles. For
example, if PA = 0x25, the Setup time is 37 + 1 = 38 cycles
of HCLK.
PCCommon
Address: 0x8008_0024 - Read/Write
Default: 0x0000_0000
Definition: PC Card Common register
Bit Descriptions:
RSVD:
Reserved - Unknown During Read
WC:
Common Space Width - Read/Write
The value written to this bit specifies the bus-width of the
Common space:
0 - 8-bit wide Common space
1 - 16-bit wide Common space
AC:
Common Space Access time - Read/Write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
WC
RSVD
AC
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
HC
PC