Chapter 8. graphics accelerator -1 – Cirrus Logic EP93xx User Manual
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Copyright 2007 Cirrus Logic, Inc.
DS785UM1
EP93xx User’s Guide
7.4.8.6 FRAME_CNTx timing ..................................................................................7-16
7.4.8.7 Grayscale Look-Up Table (GrySclLUT) .......................................................7-17
7.4.8.8 GrySclLUT Timing Diagram .........................................................................7-18
7.4.10.1 Setting the Video Memory Parameters......................................................7-31
7.4.10.2 PixelMode ..................................................................................................7-32
7.4.11.1 BlinkRate ...................................................................................................7-32
7.4.11.2 Defining Blink Pixels ..................................................................................7-32
7.4.11.3 Types of Blinking .......................................................................................7-33
8.4.1 Memory Organization for 1 Bit Per Pixel (bpp) ...............................................................8-5
8.4.2 Memory Organization for 4-Bits Per Pixel .......................................................................8-5
8.4.3 Memory Organization for 8-Bits Per Pixel .......................................................................8-5
8.4.4 Memory Organization for 16-Bits Per Pixel .....................................................................8-6
8.4.5 Memory Organization for 24-Bits Per Pixel .....................................................................8-7
8.4.6 Memory Map Access .......................................................................................................8-8
8.5.1.1 Example: 8 BPP mode...................................................................................8-8
8.5.1.2 Example: 24 BPP (packed) mode..................................................................8-9
8.5.2.1 4 BPP Word Layout .....................................................................................8-10
8.5.2.2 8 BPP Word Layout .....................................................................................8-11
8.5.2.3 16 BPP WORD Layout ................................................................................8-11
8.5.2.4 24 BPP mode...............................................................................................8-12
8.6.1 Breshenham’s Algorithm Line Draw ..............................................................................8-13
8.6.2 Example of Breshenham’s Algorithm Line Draw ...........................................................8-15
8.6.3 Block Fill Function .........................................................................................................8-16