Vidsigctrl – Cirrus Logic EP93xx User Manual
Page 260
7-78
DS785UM1
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
7
7
Bit Descriptions:
RSVD:
Reserved - Unknown during read
SIGVAL:
Signature Results Value - Read ONly
The Signature Results Value contained in this field is the
16-bit result of the video output signature calculation. This
Signature Results Value is usually updated once per frame
based on the
location. During grayscale
operation, the Signature Results Value is updated once
every 12 frames.
VidSigCtrl
Address: 0x8003_0204
Default: 0x0000_0000
Definition: Video Output Signature Control register
Bit Descriptions:
EN:
Enable - Read/Write
Writing a ‘1’ to this bit enables the Linear Feedback Shift
Register (LFSR).
Writing a ‘0’ to this bit disables the LFSR.
RSVD:
Reserved - Unknown during read
SPCLK:
Smart Panel/Pixel Clock - Read/Write
Writing a ‘1’ to this bit enables the SPCLK output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the SPCLK output for
calculation in the video signature.
BRIGHT:
Bright - Read/Write
Writing a ‘1’ to this bit enables the Brightness control
output for calculation in the video signature.
Writing a ‘0’ to this bit disables the Brightness control
output for calculation in the video signature.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
EN
RSVD
SPCLK
BRIGHT
CLKEN
BLANK
HSYNC
VSYNC
PEN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PEN