Cirrus Logic EP93xx - Manual (Page 67)

DS785UM1 2-29
Copyright 2007 Cirrus Logic
ARM920T Core and Advanced High-Speed Bus (AHB)
EP93xx User’s Guide
2
2
2
0x808B_0008 IrAdrMatchVal IrDA Address Match Value Register N
0x808B_000C IrFlag IrDA Flag Register N
0x808B_0010 IrData IrDA Transmit and Receive FIFOs N
0x808B_0014 IrDataTail IrDA Data Tail Register N
0x808B_0018 - 0x808B_001C Reserved
0x808B_0020 IrRIB IrDA Receive Information Buffer N
0x808B_0024 IrTR0 IrDA Test Register, Received byte count N
0x808B_0088 MIIR IrDA MIR Interrupt Register N
0x808B_008C - 0x808B_018C Reserved
0x808C_xxxx UART1 UART1 Control Registers
0x808C_0000 UART1Data UART1 Data Register N
0x808C_0004 UART1RXSts UART1 Receive Status Register N
0x808C_0008 UART1LinCtrlHigh UART1 Line Control Register - High Byte N
0x808C_000C UART1LinCtrlMid UART1 Line Control Register - Middle Byte N
0x808C_0010 UART1LinCtrlLow UART1 Line Control Register - Low Byte N
0x808C_0014 UART1Ctrl UART1 Control Register N
0x808C_0018 UART1Flag UART1 Flag Register N
0x808C_001C UART1IntIDIntClr UART1 Interrupt ID and Interrupt Clear Register N
0x808C_0020 Reserved
0x808C_0028 UART1DMACtrl UART1 DMA Control Register N
0x808C_0100 UART1ModemCtrl UART1 Modem Control Register N
0x808C_0104 UART1ModemSts UART1 Modem Status Register N
0x808C_0114 - 0x808C_0208 Reserved
0x808C_020C UART1HDLCCtrl UART1 HDLC Control Register N
0x808C_0210 UART1HDLCAddMtchVal UART1 HDLC Address Match Value N
0x808C_0214 UART1HDLCAddMask UART1 HDLC Address Mask N
0x808C_0218 UART1HDLCRXInfoBuf UART1 HDLC Receive Information Buffer N
0x808C_021C UART1HDLCSts UART1 HDLC Status Register N
0x808D_xxxx UART2 UART2 Control Registers
0x808D_0000 UART2Data UART2 Data Register N
0x808D_0004 UART2RXSts UART2 Receive Status Register N
0x808D_0008 UART2LinCtrlHigh UART2 Line Control Register - High Byte N
0x808D_000C UART2LinCtrlMid UART2 Line Control Register - Middle Byte N
0x808D_0010 UART2LinCtrlLow UART2 Line Control Register - Low Byte N
0x808D_0014 UART2Ctrl UART2 Control Register N
0x808D_0018 UART2Flag UART2 Flag Register N
0x808D_001C UART2IntIDIntClr UART2 Interrupt ID and Interrupt Clear Register N
0x808D_0020 UART2IrLowPwrCntr UART2 IrDA Low-power Counter Register N
0x808D_0028 UART2DMACtrl UART2 DMA Control Register N
Table 2-8. Internal Register Map (Continued)
Address Register Name Register Description
SW
Lock