Cirrus Logic EP93xx - Manual (Page 653)

DS785UM1 20-5
Copyright 2007 Cirrus Logic
Real Time Clock With Software Trim
EP93xx User’s Guide
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RTCMatch
Address:
0x8092_0004 - Read/Write
Default:
0x0000_0000
Definition:
RTC Match Register. Contain the 32 bit match value. When the RTCData
value equals the RTCMatch value the RTC will generate an interrupt if the
RTCCtrl.MIE bit is set to “1”.
Bit Descriptions:
RTCMR: Match value.
RTCSts
Address:
0x8092_0008 - Read/Write
Default:
0x0000_0000
Definition:
RTC Interrupt Status and End Of Interrupt Register. Writing to this register
clears the asserted interrupt.
Bit Descriptions:
RSVD: Reserved, unknown during read.
INTR: Interrupt status,
1 - RTC interrupt is asserted
0 - no interrupt.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RTCMR
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RTCMR
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD INTR