Hashtbl, Unchanged, Htb: hash table entries – Cirrus Logic EP93xx User Manual
Page 356
9-54
DS785UM1
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
HashTbl
Address:
0x8001_0050 through 0x8001_0057 - 8 Bytes - Read/Write,
when AFP = 111b
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Hash Table Register. The hash table is used as a way of filtering groups of
addresses in the receiver. Following the reception of the destination address
(first 6 bytes of a receive frame), the upper 6 bits of the computed CRC are
used as an address into the hash table. If the bit accessed by this address is a
“1”, the frame passes the hash table test, if the bit is a “0”, the frame fails the
hash table test.
The hash table may be used for either or both of individual addressed frames
and group address frames, depending on the IAHA and MA bits in RXCtl. A
frame has a group address if the first bit of the frame is a one.
If an individual address frame passes the hash test and the IAHA bit is set, the
frame passes the destination filter.
If a group address frame passes the hash test and the MA bit set, the frame
passes the destination filter.
Bit Descriptions:
HTb:
Hash Table entries.
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
HTb
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
HTb
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
HTb
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HTb