Cirrus Logic EP93xx User Manual

Page 350

9-48

DS785UM1

1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide

RESET:

Soft Reset. This is an act-once bit. When set, a Soft Reset
is initiated immediately, this will reset the FIFO, mac and
Descriptor Processor. This bit is cleared as a result of the
reset. Driver software should wait until the bit is cleared
before proceeding with MAC initialization.

DiagAd

Address:

0x8001_0038 - Read/Write

Chip Reset:

0x0000_0000

Soft Reset:

0x0000_0000

Definition:

Diagnostic Address Register. The Diagnostic Address Register provides an
indirect addressing method to point to internal diagnostic locations, which
provide access to features not required for normal driver operation. To access
the internal registers, the address of the register is written to the Diagnostic
Address register, and the Diagnostic Data register is used to access the actual
data.

Bit Descriptions:

RSVD:

Reserved. Unknown During Read.

ADDR:

Diagnostic Address. The following table identifies the
address map.
Address Register

Name

0x00

Debug Control

0x04

Debug FIFO Control

0x08

Debug FIFO Data

0x98

Receive Data FIFO Pointers

0x9C

Transmit Data FIFO Pointers

0xA0

Receive Status FIFO Pointers

0xA4

Transmit Status FIFO Pointers

0xA8

Receive Descriptor FIFO Pointers

0xAC

Transmit Descriptor FIFO Pointers

RSVD

ADDR