7 mac service data unit (msdu), 8 mac footer (mfr) fields, 2 frame check sequence (fcs) – Rainbow Electronics ATmega128RFA1 User Manual
Page 66: 1 overview, 2 crc calculation, Frame check sequence (fcs)" on, Atmega128rfa1
66
8266A-MCU Wireless-12/09
ATmega128RFA1
subfield b3 is set to one (see section
"Frame Compatibility between IEEE 802.15.4-
2003 and IEEE 802.15.4-2006" on
page 65). For details of its structure see
IEEE 802.15.4-2006, 7.6.2 Auxiliary security header.
9.5.1.2.7 MAC Service Data Unit (MSDU)
This is the actual MAC payload. It is usually structured according to the individual frame
type. A description can be found in IEEE 802.15.4-2006, chapter 5.5.3.2.
9.5.1.2.8 MAC Footer (MFR) Fields
The MAC footer consists of a two-octet Frame Checksum (FCS). For details refer to the
following section
"Frame Check Sequence (FCS)" below
.
9.5.2 Frame Check Sequence (FCS)
The Frame Check Sequence (FCS) is characterized by:
•
Indicate bit errors based on a cyclic redundancy check (CRC) of 16 bit length;
•
Uses International Telecommunication Union (ITU) CRC polynomial;
•
Automatically evaluated during reception;
•
Can be automatically generated during transmission.
9.5.2.1 Overview
The FCS is intended for use at the MAC layer to detect corrupted frames at a first level
of filtering. It is computed by applying an ITU CRC polynomial to all transferred bytes
following the length field (MHR and MSDU fields). The frame check sequence has a
length of 16 bit and is located in the last two bytes of a frame (MAC footer, see
The radio transceiver applies an FCS check on each received frame. The result of the
FCS check is stored in bit RX_CRC_VALID of register PHY_RSSI.
On transmit the radio transceiver generates and appends the FCS bytes during the
frame transmission. This behavior can be disabled by setting the bit
TX_AUTO_CRC_ON = 0 in register TRX_CTRL_1.
9.5.2.2 CRC calculation
The CRC polynomial used in IEEE 802.15.4 networks is defined by
1
)
(
5
12
16
16
+
+
+
=
x
x
x
x
G
The FCS shall be calculated for transmission using the following algorithm:
Let
1
2
2
1
1
0
)
(
−
−
−
−
+
+
+
+
=
k
k
k
k
b
x
b
x
b
x
b
x
M
K
be the polynomial representing the sequence of bits for which the checksum is to be
computed. Multiply M(x) by x
16
giving the polynomial
16
)
(
)
(
x
x
M
x
N
⋅
=
Divide
)
(x
N
modulo 2 by the generator polynomial G
16
(x)
to obtain the remainder
polynomial
15
14
14
1
15
0
...
)
(
r
x
r
x
r
x
r
x
R
+
+
+
+
=
The FCS field is given by the coefficients of the remainder polynomial, R(x).