4 boundary-scan chain, 4 boundary-scan specific jtag instructions, 1 extest; 0x0 – Rainbow Electronics ATmega128RFA1 User Manual
Page 443: 2 idcode; 0x1
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443
8266A-MCU Wireless-12/09
ATmega128RFA1
Figure 29-2. Reset Register
D
Q
From
TDI
ClockDR · AVR_RESET
To
TDO
From Other Internal and
External Reset Sources
Internal reset
29.3.4 Boundary-scan Chain
The Boundary-scan Chain has the capability of driving and observing the logic levels on
the digital I/O pins, as well as the boundary between digital and analog logic for analog
circuitry having off-chip connections.
"Boundary-scan Chain" on page 444
for a complete description.
29.4 Boundary-scan Specific JTAG Instructions
The Instruction Register is 4-bit wide, supporting up to 16 instructions. Listed below are
the JTAG instructions useful for Boundary-scan operation. Note that the optional HIGHZ
instruction is not implemented, but all outputs with tri-state capability can be set in high-
impedance state by using the AVR_RESET instruction, since the initial state for all port
pins is tri-state.
As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.
The OPCODE for each instruction is shown behind the instruction name in hex format.
The text describes which Data Register is selected as path between TDI and TDO for
each instruction.
29.4.1 EXTEST; 0x0
Mandatory JTAG instruction for selecting the Boundary-scan Chain as Data Register for
testing circuitry external to the AVR package. For port-pins, Pull-up Disable, Output
Control, Output Data, and Input Data are all accessible in the scan chain. For Analog
circuits having off-chip connections, the interface between the analog and the digital
logic is in the scan chain. The contents of the latched outputs of the Boundary-scan
chain is driven out as soon as the JTAG IR-Register is loaded with the EXTEST
instruction.
The active states are:
•
Capture-DR: Data on the external pins are sampled into the Boundary-scan Chain.
•
Shift-DR: The Internal Scan Chain is shifted by the TCK input.
•
Update-DR: Data from the scan chain is applied to output pins.
29.4.2 IDCODE; 0x1
Optional JTAG instruction selecting the 32 bit ID-Register as Data Register. The ID-
Register consists of a version number, a device number and the manufacturer code
chosen by JEDEC. This is the default instruction after power-up.