Rainbow Electronics ATmega128RFA1 - Manual (Page 368)

368
8266A-MCU Wireless-12/09
ATmega128RFA1
24 USART in SPI Mode
The Universal Synchronous and Asynchronous Serial Receiver and Transmitter
(USART) can be set to a master SPI compliant mode of operation. The Master SPI
Mode (MSPIM) has the following features:
• Full duplex, three-wire synchronous data transfer
• Master operation
• Supports all four SPI modes of operation (mode 0, 1, 2, and 3)
• LSB first or MSB first data transfer (configurable data order)
• Queued operation (double buffered)
• High resolution baud rate generator
• High speed operation (f
XCK,MAX
= f
CK
/2)
• Flexible interrupt generation
24.1 Overview
Setting both UMSELn1:0 bits to one enables the USART in MSPIM logic. In this mode
of operation the SPI master control logic takes direct control over the USART
resources. These resources include the transmitter and receiver shift register and
buffers, and the baud rate generator. The parity generator and checker, the data and
clock recovery logic, and the RX and TX control logic is disabled. The USART RX and
TX control logic is replaced by a common SPI transfer control logic. However, the pin
control logic and interrupt generation logic is identical in both modes of operation.
The I/O register locations are the same in both modes. However, some of the
functionality of the control registers changes when using MSPIM.
24.2 USART MSPIM vs. SPI
The ATmega128RFA1 USART in MSPIM mode is fully compatible with the
ATmega128RFA1 SPI regarding:
• Master mode timing diagram.
• The UCPOLn bit functionality is identical to the SPI CPOL bit.
• The UCPHAn bit functionality is identical to the SPI CPHA bit.
• The UDORDn bit functionality is identical to the SPI DORD bit.
However, since the USART in MSPIM mode reuses the USART resources, the use of
the USART in MSPIM mode is somewhat different compared to the SPI. In addition to
differences of the control register bits, and that only master operation is supported by
the USART in MSPIM mode, the following features differ between the two modules:
• The USART in MSPIM mode includes (double) buffering of the transmitter. The SPI
has no buffer.
• The USART in MSPIM mode receiver includes an additional buffer level.
• The SPI WCOL (Write Collision) bit is not included in USART in MSPIM mode.
• The SPI double speed mode (SPI2X) bit is not included. However, the same effect is
achieved by setting UBRRn accordingly.
• Interrupt timing is not compatible.
• Pin control differs due to the master only operation of the USART in MSPIM mode.
A comparison of the USART in MSPIM mode and the SPI pins is shown in Table 24–3
on page 373 .