Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual
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8266A-MCU Wireless-12/09
ATmega128RFA1
The two Timer/Counter I/O locations (TCNT3H and TCNT3L, combined TCNT3) give
direct access, both for read and for write operations, to the Timer/Counter unit 16-bit
counter. To ensure that both the high and low bytes are read and written simultaneously
when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See section "Accessing 16-bit Registers" for details. Modifying the
counter (TCNT3) while the counter is running introduces a risk of missing a compare
match between TCNT3 and one of the OCR3x Registers. Writing to the TCNT3
Register blocks (removes) the compare match on the following timer clock for all
compare units.
•
Bit 7:0 – TCNT3L7:0 - Timer/Counter3 Low Byte
18.11.21 OCR3AH – Timer/Counter3 Output Compare Register A High Byte
Bit
7
6
5
4
3
2
1
0
NA ($99)
OCR3AH7:0
OCR3AH
Read/Write
RW
RW
RW
RW
RW
RW
RW
RW
Initial Value
0
0
0
0
0
0
0
0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT3). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC3A pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
•
Bit 7:0 – OCR3AH7:0 - Timer/Counter3 Output Compare Register High Byte
18.11.22 OCR3AL – Timer/Counter3 Output Compare Register A Low Byte
Bit
7
6
5
4
3
2
1
0
NA ($98)
OCR3AL7:0
OCR3AL
Read/Write
RW
RW
RW
RW
RW
RW
RW
RW
Initial Value
0
0
0
0
0
0
0
0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT3). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC3A pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
•
Bit 7:0 – OCR3AL7:0 - Timer/Counter3 Output Compare Register Low Byte