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4 counter unit, 5 modes of operation, Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual

Page 311

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311


8266A-MCU Wireless-12/09

ATmega128RFA1

"Asynchronous Operation of Timer/Counter2" on page 320

. For details on clock sources

and prescaler, see section

"Timer/Counter Prescaler" on page 322

.

21.4 Counter Unit

The main part of the 8-bit Timer/Counter is the programmable bi-directional counter
unit.

Figure 21-2 below

shows a block diagram of the counter and its surrounding

environment.

Figure 21-2. Counter Unit Block Diagram

DATA BUS

TCNTn

Control Logic

count

TOVn
(Int.Req.)

top

bottom

direction

clear

Prescaler

clkTn

TOSC1

T/C

Oscillator

TOSC2

cl k

I/O

AMR

Signal description (internal signals):

count

Increment or decrement TCNT2 by 1.

direction

Selects between increment and decrement.

clear

Clear TCNT2 (set all bits to zero).

clk

Tn

Timer/Counter clock, referred to as clk

T2

in the following.

top

Signalizes that TCNT2 has reached maximum value.

bottom

Signalizes that TCNT2 has reached minimum value (zero).

Depending on the mode of operation used, the counter is cleared, incremented, or
decremented at each timer clock (clk

T2

). clk

T2

can be generated from an external or

internal clock source, selected by the Clock Select bits (CS22:0). When no clock source
is selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be
accessed by the CPU, regardless of whether clk

T2

is present or not. A CPU write

overrides (has priority over) all counter clear or count operations.

The counting sequence is determined by the setting of the WGM21 and WGM20 bits
located in the Timer/Counter Control Register (TCCR2A) and the WGM22 located in the
Timer/Counter Control Register B (TCCR2B). There are close connections between
how the counter behaves (counts) and how waveforms are generated on the Output
Compare outputs OC2A and OC2B. For more details about advanced counting
sequences and waveform generation, see chapter

"Modes of Operation" below

.

The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation
selected by the WGM22:0 bits. TOV2 can be used for generating a CPU interrupt.

21.5 Modes of Operation

The mode of operation, i.e., the behaviour of the Timer/Counter and the Output
Compare pins, is defined by the combination of the Waveform Generation mode
(WGM22:0) and Compare Output mode (COM2x1:0) bits. The Compare Output mode
bits do not affect the counting sequence, while the Waveform Generation mode bits do.
The COM2x1:0 bits control whether the PWM output generated should be inverted or