Rainbow Electronics ATmega128RFA1 - Manual (Page 232)

232
8266A-MCU Wireless-12/09
ATmega128RFA1
17.7 Modes of Operation
The mode of operation i.e., the behavior of the Timer/Counter and the Output Compare
pins, is defined by the combination of the Waveform Generation mode (WGM02:0) and
Compare Output mode (COM0x1:0) bits. The Compare Output mode bits do not affect
the counting sequence while the Waveform Generation mode bits do. The COM0x1:0
bits control whether the PWM output generated should be inverted or not (inverted or
non-inverted PWM). For non-PWM modes the COM0x1:0 bits control whether the
output should be set, cleared, or toggled at a Compare Match (see
"Output Compare
Unit" on page 228 ).
For detailed timing information see "Timer/Counter Timing Diagrams" on page 236 .
Table 17-5 shows the function of the WGM2:0 bits of registers TCCR0A and TCCR0B.
These bits control the counting sequence of the counter, the source for maximum
(TOP) counter value, and what type of waveform generation to be used.
Table 17-5. Waveform Generation Mode Bit Description
Mode WGM2 WGM1 WGM0
Timer/Counter
Mode of
Operation TOP
Update of
OCRX at
TOV Flag
Set on
(0,0)
0 0 0 0 Normal 0xFF Immediate MAX
1 0 0 1
PWM, Phase
Correct
0xFF TOP BOTTOM
2 0 1 0 CTC OCRA Immediate MAX
3 0 1 1 Fast PWM 0xFF TOP MAX
4 1 0 0 Reserved – – –
5 1 0 1
PWM, Phase
Correct
OCRA TOP BOTTOM
6 1 1 0 Reserved – – –
7 1 1 1 Fast PWM OCRA BOTTOM TOP
Notes: 1. MAX = 0xFF
2. BOTTOM = 0x00
17.7.1 Normal Mode
The simplest mode of operation is the Normal mode (WGM02:0 = 0). In this mode the
counting direction is always up (incrementing) and no counter clear is performed. The
counter simply overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then
restarts from the BOTTOM (0x00). In normal operation the Timer/Counter Overflow
Flag (TOV0) will be set at the same timer clock cycle when the TCNT0 becomes zero.
The TOV0 Flag in this case behaves like a 9
th
bit, except that it is only set and not
cleared. However, the timer resolution can be increased by software utilizing the timer
overflow interrupt that automatically clears the TOV0 Flag. There are no special cases
to consider in the Normal mode. A new counter value can be written at anytime.
The Output Compare Unit can be used to generate interrupts at some given time. It is
not recommended to use the Output Compare for waveform generation in Normal
mode, since this will occupy too much CPU time.
17.7.2 Clear Timer on Compare Match (CTC) Mode
In Clear Timer on Compare (CTC) mode (WGM02:0 = 2), the OCR0A Register is used
to manipulate the counter resolution. In CTC mode the counter is cleared to zero when
the counter value (TCNT0) matches OCR0A. The OCR0A value defines the TOP value