Rainbow Electronics ATmega128RFA1 - Manual (Page 246)

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8266A-MCU Wireless-12/09
ATmega128RFA1
Timer/Counter value at all time. The result of the compare can be used by the
Waveform Generator to generate a PWM or variable frequency output on the Output
Compare pin (OCnA/B/C). See section
"Output Compare Units" on page 252 for details.
The compare match event will also set the Compare Match Flag (OCFnA/B/C) which
can be used to generate an Output Compare interrupt request.
The Input Capture Register can capture the Timer/Counter value at a given external
(edge triggered) event on either the Input Capture pin (ICPn) or on the Analog
Comparator pins (see
"AC – Analog Comparator" on page 407 ). The Input Capture unit
includes a digital filtering unit (Noise Canceller) for reducing the chance of capturing
noise spikes.
The TOP value, or maximum Timer/Counter value, can in some modes of operation be
defined by either the OCRnA Register, the ICRn Register or by a set of fixed values.
When using OCRnA as TOP value in a PWM mode, the OCRnA Register can not be
used for generating a PWM output. However the TOP value will in this case be double
buffered allowing the TOP value to be changed at run time. If a fixed TOP value is
required, the ICRn Register can be used as an alternative, freeing the OCRnA to be
used as PWM output.
18.2.2 Definitions
The following definitions are used extensively throughout the document:
Table 18-1. Definitions
BOTTOM The counter reaches the BOTTOM when it becomes 0x0000.
MAX The counter reaches its MAXimum when it becomes 0xFFFF (decimal 65535).
TOP The counter reaches the TOP when it becomes equal to the highest value in
the count sequence. The TOP value can be assigned to be one of the fixed
values: 0x00FF, 0x01FF, 0x03FF or to the value stored in the OCRnA or ICRn
Register. The assignment is dependent of the mode of operation.
18.3 Accessing 16-bit Registers
The TCNTn, OCRnA/B/C and ICRn are 16-bit registers that can be accessed by the
AVR CPU via the 8-bit data bus. The 16-bit register must be byte accessed using two
read or write operations. Each 16-bit timer has a single 8-bit register for temporary
storing of the high byte of the 16-bit access. The same Temporary Register is shared
between all 16-bit registers within each 16-bit timer. Accessing the low byte triggers the
16-bit read or write operation. When the low byte of a 16-bit register is written by the
CPU, the written low byte and the high byte stored in the Temporary Register are both
copied into the 16-bit register in the same clock cycle. When the low byte of a 16-bit
register is read by the CPU, the high byte of the 16-bit register is copied into the
Temporary Register in the same clock cycle as the low byte is read.
Not all 16-bit accesses use the Temporary Register for the high byte. Reading the
OCRnA/B/C 16-bit registers does not involve using the Temporary Register.
To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read,
the low byte must be read before the high byte.
The following code examples show how to access the 16-bit timer registers assuming
that no interrupt updates the temporary register. The same principle can be used
directly for accessing the OCRnA/B/C and ICRn Registers. Note that when using the C-
programming language, the compiler handles the 16-bit access.