4 tccr2b - timer/counter2 control register b, Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual
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8266A-MCU Wireless-12/09
ATmega128RFA1
Table 21-9 WGM2 Register Bits
Register Bits
Value
Description
0x0
Normal mode of operation
0x1
PWM, phase correct, TOP=0xFF
0x2
CTC, TOP = OCRA
0x3
Fast PWM, TOP=0xFF
0x4
Reserved
0x5
PWM, Phase correct, TOP = OCRA
0x6
Reserved
WGM21:20
0x7
Fast PWM, TOP=OCRA
21.11.4 TCCR2B – Timer/Counter2 Control Register B
Bit
7
6
5
4
3
2
1
0
NA ($B1)
FOC2A
FOC2B
Res1
Res0
WGM22
CS22
CS21
CS20
TCCR2B
Read/Write
RW
RW
RW
RW
RW
RW
RW
RW
Initial Value
0
0
0
0
0
0
0
0
•
Bit 7 – FOC2A - Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode. However,
for ensuring compatibility with future devices, this bit must be set to zero when TCCR2B
is written in PWM mode operation. When writing a logical one to the FOC2A bit, an
immediate Compare Match is forced on the Waveform Generation unit. The OC2A
output is changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is
implemented as a strobe. Therefore it is the value present in the COM2A1:0 bits that
determines the effect of the forced compare. A FOC2A strobe will not generate any
interrupt, nor will it clear the timer in CTC mode using OCR2A as TOP. The FOC2A bit
is always read as zero.
•
Bit 6 – FOC2B - Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode. However,
for ensuring compatibility with future devices, this bit must be set to zero when TCCR2B
is written in PWM mode operation. When writing a logical one to the FOC2B bit, an
immediate Compare Match is forced on the Waveform Generation unit. The OC2B
output is changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is
implemented as a strobe. Therefore it is the value present in the COM2B1:0 bits that
determines the effect of the forced compare. A FOC2B strobe will not generate any
interrupt, nor will it clear the timer in CTC mode using OCR2B as TOP. The FOC2B bit
is always read as zero.
•
Bit 5:4 – Res1:0 - Reserved
•
Bit 3 – WGM22 - Waveform Generation Mode
Combined with the WGM21:0 bits found in the TCCR2A Register, this bit controls the
counting sequence of the counter, the source for maximum (TOP) counter value, and
what type of waveform generation to be used. See description of "TCCR2A -
Timer/Counter2 Control Register A" for details.
•
Bit 2:0 – CS22:20 - Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter2. If
external pin modes are used for the Timer/Counter2, transitions on the T2 pin will clock