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10 reading the signature row from software, Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual

Page 457

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457


8266A-MCU Wireless-12/09

ATmega128RFA1

Bit

7

6

5

4

3

2

1

0

Rd

-

-

BLB12

BLB11

BLB02

BLB01

LB2

LB1

The algorithm for reading the Fuse Low byte is similar to the one described above for
reading the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and
set the BLBSET and SPMEN bits in SPMCSR. When an (E)LPM instruction is executed
within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Fuse Low byte (FLB) will be loaded in the destination register as shown on
the next page. Refer to (see

"Table 31-5" on page 466

) for a detailed description and

mapping of the Fuse Low byte.

Bit

7

6

5

4

3

2

1

0

Rd

FLB7

FLB6

FLB5

FLB4

FLB3

FLB2

FLB1

FLB0

Similarly, load 0x0003 in the Z-pointer for reading the Fuse High byte. When an (E)LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCSR, the value of the Fuse High byte (FHB) will be loaded in the destination
register as shown below. Refer to

"Table 31-4" on page 465

for detailed description and

mapping of the Fuse High byte.

Bit

7

6

5

4

3

2

1

0

Rd

FHB7

FHB6

FHB5

FHB4

FHB3

FHB2

FHB1

FHB0

Load 0x0002 in the Z-pointer for reading the Extended Fuse byte. When an (E)LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCSR, the value of the Extended Fuse byte (EFB) will be loaded in the
destination register as shown below. Refer to

Table 31-3 on page 465

for detailed

description and mapping of the Extended Fuse byte.

Bit

7

6

5

4

3

2

1

0

Rd

-

-

-

-

-

EFB2

EFB1

EFB0

Fuse and Lock bits that are programmed will be read as zero. Fuse and Lock bits that
are un-programmed will be read as one.

30.6.10 Reading the Signature Row from Software

To read the Signature Row from software, load the Z-pointer with the signature byte
address given in

Table 30-3 below

and set the SIGRD and SPMEN bits in SPMCSR.

When a LPM instruction is executed within three CPU cycles after the SIGRD and
SPMEN bits are set in SPMCSR, the signature byte value will be loaded in the
destination register. The SIGRD and SPMEN bits will auto-clear upon completion of
reading the Signature Row or if no LPM instruction is executed within three CPU cycles.
When SIGRD and SPMEN are cleared, LPM will work as described in the Instruction
Set Manual. The Signature Row cannot be read during an EEPROM write/erase
operation.

Table 30-3. Signature Row Addressing

Signature Byte

Z-Pointer Address

Device Signature Byte 1

0x0000

Device Signature Byte 2

0x0002

Device Signature Byte 3

0x0004

RC Oscillator Calibration Byte

0x0001

Note:

2. All other addresses are reserved for future use.