beautypg.com

Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual

Page 282

background image

282



8266A-MCU Wireless-12/09

ATmega128RFA1

18.11.23 OCR3BH – Timer/Counter3 Output Compare Register B High Byte

Bit

7

6

5

4

3

2

1

0

NA ($9B)

OCR3BH7:0

OCR3BH

Read/Write

RW

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT3). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC3B pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.

Bit 7:0 – OCR3BH7:0 - Timer/Counter3 Output Compare Register High Byte

18.11.24 OCR3BL – Timer/Counter3 Output Compare Register B Low Byte

Bit

7

6

5

4

3

2

1

0

NA ($9A)

OCR3BL7:0

OCR3BL

Read/Write

R

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT3). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC3B pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.

Bit 7:0 – OCR3BL7:0 - Timer/Counter3 Output Compare Register Low Byte

18.11.25 OCR3CH – Timer/Counter3 Output Compare Register C High Byte

Bit

7

6

5

4

3

2

1

0

NA ($9D)

OCR3CH7:0

OCR3CH

Read/Write

RW

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT3). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC3C pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.

Bit 7:0 – OCR3CH7:0 - Timer/Counter3 Output Compare Register High Byte