7 boundary-scan description language files, 8 atmega128rfa1 boundary-scan order – Rainbow Electronics ATmega128RFA1 User Manual
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448
8266A-MCU Wireless-12/09
ATmega128RFA1
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Bit 4 – JTRF - JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register
selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset,
or by writing a logic zero to the flag.
29.7 Boundary-scan Description Language Files
Boundary-scan Description Language (BSDL) files describe Boundary-scan capable
devices in a standard format used by automated test-generation software. The order
and function of bits in the Boundary-scan Data Register are included in this description.
BSDL files are available for ATmega128RFA1.
29.8 ATmega128RFA1 Boundary-scan Order
page 449 shows the Scan order between TDI and TDO when the
Boundary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in,
and the first bit scanned out. The scan order follows the pin-out order. In
, PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, PXn. Bit 4,
5, 6 and 7 of Port F is not in the scan chain, since these pins constitute the TAP pins
when the JTAG is enabled.