Rainbow Electronics ATmega128RFA1 - Manual (Page 406)

406
8266A-MCU Wireless-12/09
ATmega128RFA1
25.9.6 TWAMR – TWI (Slave) Address Mask Register
Bit 7 6 5 4 3 2 1 0
NA ($BD) TWAM6 TWAM5 TWAM4 TWAM3 TWAM2 TWAM1 TWAM0 Res TWAMR
Read/Write RW RW RW RW RW RW RW R
Initial Value 0 0 0 0 0 0 0 0
• Bit 7:1 – TWAM6:0 - TWI Address Mask
The TWAMR can be loaded with a 7-bit Slave Address mask. Each of the bits in
TWAMR can mask (disable) the corresponding address bit in the TWI Address Register
(TWAR). If the mask bit is set to one then the address match logic ignores the compare
between the incoming address bit and the corresponding bit in TWAR.
• Bit 0 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.