Rainbow Electronics ATmega128RFA1 - Manual (Page 476)

476
8266A-MCU Wireless-12/09
ATmega128RFA1
31.7.15 Parallel Programming Characteristics
Figure 31-10. Parallel programming timing including some general timing requirements
Data & Control
(DATA, XA0/1, BS1, BS2)
CLKI
t
XHXL
t
WLWH
t
DVXH
t
XLDX
t
PLWL
t
WLRH
WR
RDY/BSY
PAGEL t
PHPL
t
PLBX
t
BVPH
t
XLWL
t
WLBX
t
BVWL
WLRL
Figure 31-11. Parallel programming loading sequence with timing requirements
(1)
CLKI
PAGEL
t
PLXH XLXH
t
t
XLPH
ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte) DATA
BS1
XA0
XA1
LOAD ADDRESS
(LOW BYTE)
LOAD DATA
(LOW BYTE)
LOAD DATA
(HIGH BYTE)
LOAD DATA LOAD ADDRESS
(LOW BYTE)
Note: 1. The timing requirements shown in Figure 31-10 above (i.e., t
DVXH
, t
XHXL
, and t
XLDX
)
also apply to loading operation.
Figure 31-12. Parallel programming reading sequence (within the same page) with
timing requirements
(1)
CLKI
OE
ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte) DATA
BS1
XA0
XA1
LOAD ADDRESS
(LOW BYTE)
READ DATA
(LOW BYTE) READ DATA
(HIGH BYTE)
LOAD ADDRESS
(LOW BYTE)
t
BVDV
t
OLDV
t
XLOL
t
OHDZ
Note: 1. The timing requirements shown in Figure 31-10 above (i.e., t
DVXH
, t
XHXL
, and t
XLDX
)
also apply to reading operation.