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1 data memory access times, Figure 8-7 on – Rainbow Electronics ATmega128RFA1 User Manual

Page 19

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8266A-MCU Wireless-12/09

ATmega128RFA1

The five different addressing modes for the data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment.
In the Register file, registers R26 to R31 feature the indirect addressing pointer
registers.

The direct addressing reaches the entire data space.

The Indirect with Displacement mode reaches 63 address locations from the base
address given by the Y- or Z-register.

When using register indirect addressing modes with automatic pre-decrement and post-
increment, the address registers X, Y, and Z are decremented or incremented.

The 32 general purpose working registers, 64 I/O registers, and the internal data SRAM
in the ATmega128RFA1 are all accessible through all these addressing modes. The
Register File is described in

"General Purpose Register File" on page 12

.

Figure 8-7. Data Memory Map

32 Registers

64 I/O Registers

Internal SRAM

(16K x 8)

$0000 - $001F
$0020 - $005F

$41FF

$FFFF

$0060 - $01FF

Data Memory

416 Ext I/O Reg.

$0200

8.2.1 Data Memory Access Times

This section describes the general access timing concepts for internal memory access.
Access to the internal data SRAM is performed in two clk

CPU

cycles as described in

Figure 8-8 on page 20

.