Rainbow Electronics ATmega128RFA1 - Manual (Page 271)

271
8266A-MCU Wireless-12/09
ATmega128RFA1
16-bit registers. See section "Accessing 16-bit Registers" for details. Modifying the
counter (TCNT1) while the counter is running introduces a risk of missing a compare
match between TCNT1 and one of the OCR1x Registers. Writing to the TCNT1
Register blocks (removes) the compare match on the following timer clock for all
compare units.
• Bit 7:0 – TCNT1H7:0 - Timer/Counter1 High Byte
18.11.5 TCNT1L – Timer/Counter1 Low Byte
Bit 7 6 5 4 3 2 1 0
NA ($84) TCNT1L7:0 TCNT1L
Read/Write RW RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give
direct access, both for read and for write operations, to the Timer/Counter unit 16-bit
counter. To ensure that both the high and low bytes are read and written simultaneously
when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See section "Accessing 16-bit Registers" for details. Modifying the
counter (TCNT1) while the counter is running introduces a risk of missing a compare
match between TCNT1 and one of the OCR1x Registers. Writing to the TCNT1
Register blocks (removes) the compare match on the following timer clock for all
compare units.
• Bit 7:0 – TCNT1L7:0 - Timer/Counter1 Low Byte
18.11.6 OCR1AH – Timer/Counter1 Output Compare Register A High Byte
Bit 7 6 5 4 3 2 1 0
NA ($89) OCR1AH7:0 OCR1AH
Read/Write RW RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT1). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC1A pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.
• Bit 7:0 – OCR1AH7:0 - Timer/Counter1 Output Compare Register High Byte
18.11.7 OCR1AL – Timer/Counter1 Output Compare Register A Low Byte
Bit 7 6 5 4 3 2 1 0
NA ($88) OCR1AL7:0 OCR1AL
Read/Write RW RW RW RW RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0