Rainbow Electronics ATmega128RFA1 - Manual (Page 446)

446
8266A-MCU Wireless-12/09
ATmega128RFA1
Figure 29-4. General Port Pin Schematic Diagram
CLK
RPx
RRx
WRx
RDx
WDx
PUD
SYNCHRONIZER
WDx: WRITE DDRx
WRx: WRITE PORTx
RRx: READ PORTx REGISTER
RPx: READ PORTx PIN
PUD: PULLUP DISABLE
CLK : I/O CLOCK
RDx: READ DDRx
D
L
Q
Q
RESET
RESET
Q
Q D
Q
Q D
CLR
PORTxn
Q
Q D
CLR
DDxn
PINxn
DA
T
A B
US
SLEEP
SLEEP: SLEEP CONTROL
Pxn
I/O
I/O
See Boundary-scan
Description for Details!
PUExn
OCxn
ODxn
IDxn
PUExn: PULLUP ENABLE for pin Pxn
OCxn: OUTPUT CONTROL for pin Pxn
ODxn: OUTPUT DATA to pin Pxn
IDxn: INPUT DATA from pin Pxn
29.5.2 Scanning the RSTN, CLKI and TST Pin
An observe-only cell as shown in Figure 29-5 below is inserted for the active low reset
signal RSTN, for the active high programming and test mode enable signal TSTN and
for the clock input CLKI.
Figure 29-5. Observe-only Cell
0
1
D Q
From
Previous
Cell
ClockDR
ShiftDR
To
Next
Cell
From System Pin To System Logic
FF1