Rainbow Electronics ATmega128RFA1 - Manual (Page 343)

343
8266A-MCU Wireless-12/09
ATmega128RFA1
Figure 23-3. Synchronous Mode XCKn Timing
RxD / TxD
XCK
RxD / TxD
XCK UCPOL = 0
UCPOL = 1
Sample
Sample
The UCPOLn bit UCRSC selects which XCKn clock edge is used for data sampling and
which is used for data change. As
Figure 22-3 on page 335 shows, when UCPOLn is
zero the data will be changed at rising XCKn edge and sampled at falling XCKn edge. If
UCPOLn is set, the data will be changed at falling XCKn edge and sampled at rising
XCKn edge.
23.4 Frame Formats
A serial frame is defined to be one character of data bits with synchronization bits (start
and stop bits), and optionally a parity bit for error checking. The USART accepts all 30
combinations of the following as valid frame formats:
• 1 start bit
• 5, 6, 7, 8, or 9 data bits
• no, even or odd parity bit
• 1 or 2 stop bits
A frame starts with the start bit followed by the least significant data bit. Then the next
data bits, up to a total of nine, are succeeding, ending with the most significant bit. If
enabled, the parity bit is inserted after the data bits, before the stop bits. When a
complete frame is transmitted, it can be directly followed by a new frame, or the
communication line can be set to an idle (high) state.
Figure 23-4 below illustrates the
possible combinations of the frame formats. Bits inside brackets are optional.
Figure 23-4. Frame Formats
1 0 2 3 4 [5] [6] [7] [8] [P] St Sp1 [Sp2] (St / IDLE) (IDLE)
FRAME
St Start bit, always low
(n) Data bits (0 to 8)
P Parity bit - can be odd or even
Sp Stop bit, always high
IDLE No transfers on the communication line (RxDn or TxDn). An IDLE line must be
high
The frame format used by the USART is set by the UCSZn2:0, UPMn1:0 and USBSn
bits in UCSRnB and UCSRnC. The receiver and transmitter use the same setting. Note
that changing the setting of any of these bits will corrupt all ongoing communication for
both the receiver and transmitter.