5 parity checker, 6 disabling the receiver, 7 flushing the receive buffer – Rainbow Electronics ATmega128RFA1 User Manual
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8266A-MCU Wireless-12/09
ATmega128RFA1
read (as one), and the FEn flag will be one when the stop bit was incorrect (zero). This
flag can be used for detecting out-of-sync conditions, detecting break conditions and
protocol handling. The FEn flag is not affected by the setting of the USBSn bit in
UCSRnC since the receiver ignores all, except for the first, stop bits. For compatibility
with future devices, always set this bit to zero when writing to UCSRnA.
The Data OverRun Flag (DORn) indicates data loss due to a receiver buffer full
condition. A data overrun occurs when the receive buffer is full (two characters), it is a
new character waiting in the receive shift register, and a new start bit is detected. If the
DORn flag is set there was one or more serial frame lost between the frame last read
from UDRn, and the next frame read from UDRn. For compatibility with future devices,
always write this bit to zero when writing to UCSRnA. The DORn flag is cleared when
the frame received was successfully moved from the shift register to the receive buffer.
The Parity Error Flag (UPEn) indicates that the next frame in the receive buffer had a
parity error when received. If parity check is not enabled the UPEn bit will always be
read zero. For compatibility with future devices, always set this bit to zero when writing
to UCSRnA. For more details see
page 344 and
.
23.7.5 Parity Checker
The parity checker is active when the high USART parity mode (UPMn1) bit is set. Type
of parity check to be performed (odd or even) is selected by the UPMn0 bit. When
enabled, the parity checker calculates the parity of the data bits in incoming frames and
compares the result with the parity bit from the serial frame. The result of the check is
stored in the receive buffer together with the received data and stop bits. The Parity
Error Flag (UPEn) can then be read by software to check if the frame had a parity error.
The UPEn bit is set if the next character that can be read from the receive buffer had a
parity error when received .The parity checking was enabled at that point (UPMn1 = 1).
This bit is valid until the receive buffer (UDRn) is read.
23.7.6 Disabling the Receiver
In contrast to the transmitter, disabling of the receiver will be immediate. Data from
ongoing receptions will therefore be lost. When disabled (i.e., the RXENn is set to zero)
the receiver will no longer override the normal function of the RxDn port pin. The
receiver buffer FIFO will be flushed when the receiver is disabled. Remaining data in
the buffer will be lost
23.7.7 Flushing the Receive Buffer
The receiver buffer FIFO will be flushed when the receiver is disabled, i.e., the buffer
will be emptied of its contents. Unread data will be lost. If the buffer has to be flushed
during normal operation, due to for instance an error condition, read the UDRn I/O
location until the RXCn flag is cleared. The following code example shows how to flush
the receive buffer.
Assembly Code Example
(1)
USART_Flush:
sbis UCSRnA, RXCn
ret
in r16, UDRn
rjmp USART_Flush