Figure 22-2 – Rainbow Electronics ATmega128RFA1 User Manual

Page 331

Text mode
Original mode

331

8266A-MCU Wireless-12/09

ATmega128RFA1

Figure 22-1. SPI Block Diagram

(1)

SPI2X

DIVIDER

/2/4/8/16/32/64/128

Note: 1. Refer to

Figure 1-1 on page 2

and

Table 14-3 on page 193

for SPI pin placement.

Figure 22-2. SPI Master-slave Interconnection

SHIFT
ENABLE

The system is single buffered in the transmit direction and double buffered in the
receive direction. This means that bytes to be transmitted cannot be written to the SPI
Data Register before the entire shift cycle is completed. When receiving data, however,
a received character must be read from the SPI Data Register before the next character
has been completely shifted in. Otherwise, the first byte is lost. In SPI Slave mode, the