Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual
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8266A-MCU Wireless-12/09
ATmega128RFA1
18.11.56 OCR5CL – Timer/Counter5 Output Compare Register C Low Byte
Bit
7
6
5
4
3
2
1
0
NA ($12C)
OCR5CL7:0
OCR5CL
Read/Write
R
RW
RW
RW
RW
RW
RW
RW
Initial Value
0
0
0
0
0
0
0
0
The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT5). A match can be used to generate an Output Compare
interrupt. The Output Compare Registers are 16-bit in size. To ensure that both the high
and low bytes are written simultaneously when the CPU writes to these registers, the
access is performed using an 8-bit temporary High Byte Register (TEMP). This
temporary register is shared by all the other 16-bit registers. See section "Accessing 16-
bit Registers" for details.
•
Bit 7:0 – OCR5CL7:0 - Timer/Counter5 Output Compare Register Low Byte
18.11.57 ICR5H – Timer/Counter5 Input Capture Register High Byte
Bit
7
6
5
4
3
2
1
0
NA ($127)
ICR5H7:0
ICR5H
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
The Timer/Counter5 has only limited functionality. It is not connected to any I/O pin.
Therefore the contents of this register is never updated with the counter (TCNT5) value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes
are read simultaneously when the CPU accesses these registers, the access is
performed using an 8-bit temporary High Byte Register (TEMP). This temporary register
is shared by all the other 16-bit registers. See section "Accessing 16-bit Registers" for
details.
•
Bit 7:0 – ICR5H7:0 - Timer/Counter5 Input Capture Register High Byte
18.11.58 ICR5L – Timer/Counter5 Input Capture Register Low Byte
Bit
7
6
5
4
3
2
1
0
NA ($126)
ICR5L7:0
ICR5L
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
The Timer/Counter5 has only limited functionality. It is not connected to any I/O pin.
Therefore the contents of this register is never updated with the counter (TCNT5) value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes
are read simultaneously when the CPU accesses these registers, the access is
performed using an 8-bit temporary High Byte Register (TEMP). This temporary register
is shared by all the other 16-bit registers. See section "Accessing 16-bit Registers" for
details.
•
Bit 7:0 – ICR5L7:0 - Timer/Counter5 Input Capture Register Low Byte