Rainbow Electronics ATmega128RFA1 - Manual (Page 224)

224
8266A-MCU Wireless-12/09
ATmega128RFA1
• Bit 1 – PCIF1 - Pin Change Interrupt Flag 1
When a logic change on any PCINT15:8 pin triggers an interrupt request, PCIF1
becomes set (one). If the I-bit in SREG and the PCIE1 bit in PCICR are set (one), the
MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the
interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical
one to it. Note that the I/O ports corresponding to PCINT15:9 are not implemented.
• Bit 0 – PCIF0 - Pin Change Interrupt Flag 0
When a logic change on any PCINT7:0 pin triggers an interrupt request, PCIF0
becomes set (one). If the I-bit in SREG and the PCIE0 bit in PCICR are set (one), the
MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the
interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical
one to it.
16.2.7 PCMSK2 – Pin Change Mask Register 2
Bit 7 6 5 4
NA ($6D) PCINT23 PCINT22 PCINT21 PCINT20 PCMSK2
Read/Write RW RW RW RW
Initial Value 0 0 0 0
Bit 3 2 1 0
NA ($6D) PCINT19 PCINT18 PCINT17 PCINT16 PCMSK2
Read/Write RW RW RW RW
Initial Value 0 0 0 0
Note that the PCMSK2 register has no function in this device. The I/O ports associated
to PCINT23:16 are not implemented. Normally each bit PCINT23:16 selects whether
the pin change interrupt is enabled on the corresponding I/O pin. If PCINT23:16 is set
and the PCIE2 bit in PCICR is set, the pin change interrupt is enabled on the
corresponding I/O pin. If PCINT23:16 is cleared, the pin change interrupt on the
corresponding I/O pin is disabled.
• Bit 7:0 – PCINT23:16 - Pin Change Enable Mask
16.2.8 PCMSK1 – Pin Change Mask Register 1
Bit 7 6 5 4
NA ($6C) PCINT15 PCINT14 PCINT13 PCINT12 PCMSK1
Read/Write RW RW RW RW
Initial Value 0 0 0 0
Bit 3 2 1 0
NA ($6C) PCINT11 PCINT10 PCINT9 PCINT8 PCMSK1
Read/Write RW RW RW RW
Initial Value 0 0 0 0
Bit PCINT8 selects whether the pin change interrupt is enabled on the corresponding
I/O pin. If PCINT8 is set and the PCIE1 bit in PCICR is set, the pin change interrupt is
enabled on the corresponding I/O pin. If PCINT8 is cleared, the pin change interrupt on
the corresponding I/O pin is disabled.