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Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual

Page 291

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291


8266A-MCU Wireless-12/09

ATmega128RFA1

18.11.38 OCR4BH – Timer/Counter4 Output Compare Register B High Byte

Bit

7

6

5

4

3

2

1

0

NA ($AB)

OCR4BH7:0

OCR4BH

Read/Write

RW

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT4). A match can be used to generate an Output Compare
interrupt. The Output Compare Registers are 16-bit in size. To ensure that both the high
and low bytes are written simultaneously when the CPU writes to these registers, the
access is performed using an 8-bit temporary High Byte Register (TEMP). This
temporary register is shared by all the other 16-bit registers. See section "Accessing 16-
bit Registers" for details.

Bit 7:0 – OCR4BH7:0 - Timer/Counter4 Output Compare Register High Byte

18.11.39 OCR4BL – Timer/Counter4 Output Compare Register B Low Byte

Bit

7

6

5

4

3

2

1

0

NA ($AA)

OCR4BL7:0

OCR4BL

Read/Write

R

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT4). A match can be used to generate an Output Compare
interrupt. The Output Compare Registers are 16-bit in size. To ensure that both the high
and low bytes are written simultaneously when the CPU writes to these registers, the
access is performed using an 8-bit temporary High Byte Register (TEMP). This
temporary register is shared by all the other 16-bit registers. See section "Accessing 16-
bit Registers" for details.

Bit 7:0 – OCR4BL7:0 - Timer/Counter4 Output Compare Register Low Byte

18.11.40 OCR4CH – Timer/Counter4 Output Compare Register C High Byte

Bit

7

6

5

4

3

2

1

0

NA ($AD)

OCR4CH7:0

OCR4CH

Read/Write

RW

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT4). A match can be used to generate an Output Compare
interrupt. The Output Compare Registers are 16-bit in size. To ensure that both the high
and low bytes are written simultaneously when the CPU writes to these registers, the
access is performed using an 8-bit temporary High Byte Register (TEMP). This
temporary register is shared by all the other 16-bit registers. See section "Accessing 16-
bit Registers" for details.

Bit 7:0 – OCR4CH7:0 - Timer/Counter4 Output Compare Register High Byte