Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual
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8266A-MCU Wireless-12/09
ATmega128RFA1
PWM mode well suited for power regulation, rectification and DAC applications. The
high frequency allows physically small sized external components (coils, capacitors),
and therefore reduces total system cost.
In fast PWM mode, the counter is incremented until the counter value matches the TOP
value. The counter is then cleared at the following timer clock cycle. The timing diagram
for the fast PWM mode is shown in Figure 17-6. The TCNT0 value is shown in the
timing diagram as a histogram illustrating the single-slope operation. The diagram
includes non-inverted and inverted PWM outputs. The small horizontal line marks on
the TCNT0 slopes represent Compare Matches between OCR0x and TCNT0.
Figure 17-6. Fast PWM Mode Timing Diagram
TCNTn
OCRnx Update and
TOVn Interrupt Flag Set
1
Period
2
3
OCnx
OCnx
(COMnx1:0 = 2)
(COMnx1:0 = 3)
OCRnx Interrupt Flag Set
4
5
6
7
The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches TOP.
The interrupt handler routine can be used for updating the compare value if the interrupt
is enabled.
In fast PWM mode the compare unit allows generating PWM waveforms on the OC0x
pins. Setting the COM0x1:0 bits to 2 will produce a non-inverted PWM. An inverted
PWM output can be generated by setting the COM0x1:0 to 3. Setting the COM0A1:0
bits to 1 allows the OC0A pin to toggle on Compare Matches if the WGM02 bit is set.
This option is not available for the OC0B pin (see
). The actual
OC0x value will only be visible at the port pin if the data direction of the port pin is set to
output. The PWM waveform is generated by setting (or clearing) the OC0x Register at
the Compare Match between OCR0x and TCNT0, and by clearing (or setting) the OC0x
Register at the timer clock cycle when the counter is cleared (changes from TOP to
BOTTOM).
The PWM frequency for the output f
OC0xPWM
can be calculated with the following
equation:
256
/
_
0
⋅
=
N
f
f
O
I
clk
xPWM
OC
The N variable represents the pre-scale factor (1, 8, 64, 256 or 1024).
The extreme values for the OCR0A Register represent special cases when generating
a PWM waveform output in the fast PWM mode. If the OCR0A is set equal to BOTTOM,
the output will be a narrow spike for each MAX+1 timer clock cycle. Setting the OCR0A