Rainbow Electronics ATmega128RFA1 - Manual (Page 254)

254
8266A-MCU Wireless-12/09
ATmega128RFA1
18.7.1 Force Output Compare
In non-PWM Waveform Generation modes, the match output of the comparator can be
forced by writing a one to the Force Output Compare (FOCnx) bit. Forcing compare
match will not set the OCFnx Flag or reload/clear the timer, but the OCnx pin will be
updated as if a real compare match had occurred (the COMn1:0 bits settings define
whether the OCnx pin is set, cleared or toggled).
18.7.2 Compare Match Blocking by TCNTn Write
All CPU writes to the TCNTn Register will block any compare match that occurs in the
next clock cycle of the timer even when the timer is stopped. This feature allows OCRnx
to be initialized to the same value as TCNTn without triggering an interrupt when the
Timer/Counter clock is enabled.
18.7.3 Using the Output Compare Unit
Since writing TCNTn in any mode of operation will block all compare matches for one
timer clock cycle, there are risks involved when changing TCNTn using any of the
Output Compare channels, independent of whether the Timer/Counter is running or not.
If the value written to TCNTn equals the OCRnx value, the compare match will be
missed resulting in incorrect waveform generation. Do not write the TCNTn equal to
TOP in PWM modes with variable TOP values. The compare match for the TOP will be
ignored and the counter will continue to 0xFFFF. Similarly, do not write the TCNTn
value equal to BOTTOM when the counter is down-counting.
The setup of the OCnx should be performed before setting the Data Direction Register
for the port pin to output. The easiest way of setting the OCnx value is to use the Force
Output Compare (FOCnx) strobe bits in Normal mode. The OCnx Register keeps its
value even when changing between Waveform Generation modes.
Be aware that the COMnx1:0 bits are not double buffered together with the compare
value. A change of the COMnx1:0 bits will immediately take effect.
18.8 Compare Match Output Unit
The Compare Output mode (COMnx1:0) bits have two functions. The Waveform
Generator uses the COMnx1:0 bits for defining the Output Compare (OCnx) state at the
next compare match. Secondly the COMnx1:0 bits control the OCnx pin output source.
Figure 18-5 shows a simplified schematic of the logic affected by the COMnx1:0 bit
setting. The I/O Registers, I/O bits and I/O pins in the figure are shown in bold. Only the
parts of the general I/O Port Control Registers (DDR and PORT) that are affected by
the COMnx1:0 bits are shown. When referring to the OCnx state, the reference is to the
internal OCnx Register and not to the OCnx pin. After a system reset the OCnx
Register will have a value of “0”.
The general I/O port function is overridden by the Output Compare (OCnx) from the
Waveform Generator if either of the COMnx1:0 bits are set. However, the OCnx pin
direction (input or output) is still controlled by the Data Direction Register (DDR) for the
port pin. The Data Direction Register bit for the OCnx pin (DDR_OCnx) must be set as
output before the OCnx value is visible on the pin. The port override function is
generally independent of the Waveform Generation mode, but there are some
exceptions. Refer to Table 18-2, Table 18-3 and
Table 18-4 on page 256 for details.
The design of the Output Compare pin logic allows initialization of the OCnx state
before the output is enabled. Note that some COMnx1:0 bit settings are reserved for
certain modes of operation (see section
"Register Description" on page 266 ).
The COMnx1:0 bits have no effect on the Input Capture unit.