5 watchdog timer, 6 port pins, 7 on-chip debug system – Rainbow Electronics ATmega128RFA1 User Manual
Page 160: 8 symbol counter, 9 radio transceiver, Atmega128rfa1
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8266A-MCU Wireless-12/09
ATmega128RFA1
"Internal Voltage Reference" on page 179
for details on the
start-up time.
12.4.5 Watchdog Timer
If the Watchdog Timer is not needed in the application, the module should be turned off.
If the Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence,
always consume power. In the deeper sleep modes, this will contribute significantly to
the total current consumption. Refer to
for details on
how to configure the Watchdog Timer.
12.4.6 Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power.
The most important is then to ensure that no pins drive resistive loads. In sleep modes
where both the I/O clock (clk
I/O
) and the ADC clock (clk
ADC
) are stopped, the input
buffers of the device will be disabled. This ensures that no power is consumed by the
input logic when not needed. In some cases, the input logic is needed for detecting
wake-up conditions, and it will then be enabled. Refer to the section
for details on which pins are enabled. If the input buffer is enabled and the input
signal is left floating or have an analog signal level close to DEVDD/2, the input buffer
will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog
signal level close to DEVDD/2 on an input pin can cause significant current even in
active mode. Digital input buffers can be disabled by writing to the Digital Input Disable
Registers DIDR1 and DIDR0. Refer to
"DIDR1 – Digital Input Disable Register 1" on
and
"DIDR0 – Digital Input Disable Register 0" on page 433
for details.
12.4.7 On-chip Debug System
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enters sleep
mode, the main clock source is enabled, and hence, always consumes power. In the
deeper sleep modes, this will contribute significantly to the total current consumption.
There are three alternative ways to disable the OCD system:
•
Disable the OCDEN Fuse.
•
Disable the JTAGEN Fuse.
•
Write one to the JTD bit in MCUCR.
12.4.8 Symbol Counter
The Symbol Counter acts as a separate counter, which uses either the 16MHz clock
from XTAL1/XTAL2 crystal pins or the clock from PG3/PG4 low frequency crystal pins.
If the Symbol Counter module is not used, it should be disabled, see section
.
12.4.9 Radio Transceiver
The radio transceiver module is automatically starting its state machine after power on.
While the CPU is in any sleep mode, the radio transceiver remains active. This enables
the radio transceiver to wakeup the MCU if a pending action is over (frame received or
transmission completed). The radio transceiver will be inactive during sleep, if either the
its power reduction bit PRTRX24 in register PRR1 is set or it is send into SLEEP mode,
see
"PRR1 – Power Reduction Register 1" on page 168
for details.
The radio transceiver is derived from a stand alone solution that was partly controlled
by external pins. Now the radio transceiver is fully controlled by individual register bits.