Rainbow Electronics ATmega128RFA1 - Manual (Page 277)

277
8266A-MCU Wireless-12/09
ATmega128RFA1
Register Bits Value Description
(set output to high level).
• Bit 3:2 – COM3C1:0 - Compare Output Mode for Channel C
The COM3C1:0 bits control the output compare behavior of pin OC3C. If one or both of
the COM3C1:0 bits are written to one, the OC3C output overrides the normal port
functionality of the I/O pin it is connected to. However note that the Data Direction
Register (DDR) bit corresponding to the OC3C pin must be set in order to enable the
output driver. When the OC3C is connected to the pin, the function of the COM3C1:0
bits is dependent of the WGM33:0 bits setting. The following table shows the
COM3C1:0 bit functionality when the WGM33:0 bits are set to a normal or a CTC mode
(non-PWM). For the other functionality refer to section "Modes of Operation".
Table 18-14 COM3C Register Bits
Register Bits Value Description
0 Normal port operation, OCnA/OCnB/OCnC
disconnected.
1 Toggle OCnA/OCnB/OCnC on Compare
Match.
2 Clear OCnA/OCnB/OCnC on Compare
Match (set output to low level).
COM3C1:0
3 Set OCnA/OCnB/OCnC on Compare Match
(set output to high level).
• Bit 1:0 – WGM31:30 - Waveform Generation Mode
Combined with the WGM33:2 bits found in the TCCR3B Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and
what type of waveform generation to be used. Modes of operation supported by the
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC)
mode, and three types of Pulse Width Modulation (PWM) modes. For more information
on the different modes see section "Modes of Operation".
Table 18-15 WGM3 Register Bits
Register Bits Value Description
0x0 Normal mode of operation
0x1 PWM, phase correct, 8-bit
0x2 PWM, phase correct, 9-bit
0x3 PWM, phase correct, 10-bit
0x4 CTC, TOP = OCRnA
0x5 Fast PWM, 8-bit
0x6 Fast PWM, 9-bit
0x7 Fast PWM, 10-bit
0x8 PWM, Phase and frequency correct, TOP =
ICRn
0x9 PWM, Phase and frequency correct, TOP =
OCRnA
0xA PWM, Phase correct, TOP = ICRn
0xB PWM, Phase correct, TOP = OCRnA
0xC CTC, TOP = OCRnA
WGM31:30
0xD Reserved