Rainbow Electronics ATmega128RFA1 - Manual (Page 133)

133
8266A-MCU Wireless-12/09
ATmega128RFA1
10 MAC Symbol Counter
10.1 Main Features
The MAC symbol counter provides symbol timing information for IEEE 802.15.4
wireless networks. The counter time base can be derived from the 16 MHz crystal or
the RTC (32.768 kHz crystal on TOSC) during operation. In deep-sleep mode the
counter operates from the RTC clock. The module provides the following features:
• Backoff slot counter with interrupt generation
• Counter clock source selection between XTAL1 (16 MHz) and TOSC1 (RTC)
• Automatic RTC clock selection for sleep mode operation and automatic
fallback
• 3 independent compare units with relative and absolute compare mode and
interrupt generation (support for slotted operation and superframe handling)
• Low-power, deep-sleep mode operation and system wake up with all symbol
counter interrupt events
• Automatic SFD and incoming beacon timestamping
• Manual beacon timestamping
• Manual timer synchronization within a 16 µs symbol period by resetting clock
prescaler and backoff slot counter
• Atomic read/write access for 32 bit registers
10.2 Clock source selection and Sleep/Active mode operation
The symbol counter can be sourced by the transceiver clock or by the asynchronous
Real Time Clock (RTC) oscillator. If the transceiver goes from active mode into sleep
mode, the symbol counter clock source is switched to the RTC clock automatically. A
clock source change is indicated in the bit SCCKSEL of Register
"SCCR0 – Symbol
Counter Control Register 0" on page 143 . The bit SCCKSEL can not be written if the
radio tranceiver is in SLEEP mode.
After wake up, the counter switches back to the clock source which was selected before
going to sleep mode. Switching the clock source from RTC to 16 MHz resets the 16
MHz clock prescaler. This makes sure, that after switching back the clock source, the
symbol counter starts counting with a full 16 µs symbol period.
The clock source can be selected with bit SCCKSEL in the SCCR0 Register
10.3 32 bit Register Access (Atomic Read/Write)
All 32 bit registers support atomic read or write operation. That means reading or writing
the least significant xxxLL byte (the register name ends in LL) updates or captures the
complete 32 bit value.
Read Access: 1. Reading the LL-Byte captures the 32 bit value in a temporary register
2. Read the upper 3 bytes
Write Access: 1. Write the upper 3 byte
2. Writing the LL-Byte stores the 32 bit value in the counter registers
The same temporary register is used for all 32 bit register of the MAX symbol counter.