Rainbow Electronics ATmega128RFA1 - Manual (Page 293)

293
8266A-MCU Wireless-12/09
ATmega128RFA1
18.11.44 TIMSK4 – Timer/Counter4 Interrupt Mask Register
Bit 7 6 5 4 3 2 1 0
NA ($72) Res1 Res0 ICIE4 Res OCIE4C OCIE4B OCIE4A TOIE4 TIMSK4
Read/Write R R RW R R R RW RW
Initial Value 0 0 0 0 0 0 0 0
• Bit 7:6 – Res1:0 - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 5 – ICIE4 - Timer/Counter4 Input Capture Interrupt Enable
The Timer/Counter4 has only limited functionality. It does not have an Input Capture
pin. Therefore this bit has no useful meaning.
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 3 – OCIE4C - Timer/Counter4 Output Compare C Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter4 Output Compare C Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF4C Flag, located in
TIFR4, is set.
• Bit 2 – OCIE4B - Timer/Counter4 Output Compare B Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter4 Output Compare B Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF4B Flag, located in
TIFR4, is set.
• Bit 1 – OCIE4A - Timer/Counter4 Output Compare A Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter4 Output Compare A Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF4A Flag, located in
TIFR4, is set.
• Bit 0 – TOIE4 - Timer/Counter4 Overflow Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter4 Overflow interrupt is enabled. The corresponding
Interrupt Vector is executed when the TOV4 Flag, located in TIFR4, is set.
18.11.45 TIFR4 – Timer/Counter4 Interrupt Flag Register
Bit 7 6 5 4 3 2 1 0
$19 ($39) Res1 Res0 ICF4 Res OCF4C OCF4B OCF4A TOV4 TIFR4
Read/Write R R RW R RW RW RW RW
Initial Value 0 0 0 0 0 0 0 0
• Bit 7:6 – Res1:0 - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.