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Atmega128rfa1 – Rainbow Electronics ATmega128RFA1 User Manual

Page 273

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273


8266A-MCU Wireless-12/09

ATmega128RFA1

18.11.10 OCR1CH – Timer/Counter1 Output Compare Register C High Byte

Bit

7

6

5

4

3

2

1

0

NA ($8D)

OCR1CH7:0

OCR1CH

Read/Write

RW

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT1). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC1C pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.

Bit 7:0 – OCR1CH7:0 - Timer/Counter1 Output Compare Register High Byte

18.11.11 OCR1CL – Timer/Counter1 Output Compare Register C Low Byte

Bit

7

6

5

4

3

2

1

0

NA ($8C)

OCR1CL7:0

OCR1CL

Read/Write

R

RW

RW

RW

RW

RW

RW

RW

Initial Value

0

0

0

0

0

0

0

0

The Output Compare Registers contain a 16-bit value that is continuously compared
with the counter value (TCNT1). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC1C pin. The Output Compare
Registers are 16-bit in size. To ensure that both the high and low bytes are written
simultaneously when the CPU writes to these registers, the access is performed using
an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all
the other 16-bit registers. See section "Accessing 16-bit Registers" for details.

Bit 7:0 – OCR1CL7:0 - Timer/Counter1 Output Compare Register Low Byte

18.11.12 ICR1H – Timer/Counter1 Input Capture Register High Byte

Bit

7

6

5

4

3

2

1

0

NA ($87)

ICR1H7:0

ICR1H

Read/Write

R

R

R

R

R

R

R

R

Initial Value

0

0

0

0

0

0

0

0

The Input Capture Register is updated with the counter (TCNT1) value each time an
event occurs on the ICP1 pin or on the Analog Comparator output. The Input Capture
Register can be used for defining the counter TOP value. The Input Capture Register is
16-bit in size. To ensure that both the high and low bytes are read simultaneously when
the CPU accesses these registers, the access is performed using an 8-bit temporary
High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers. See section "Accessing 16-bit Registers" for details.

Bit 7:0 – ICR1H7:0 - Timer/Counter1 Input Capture Register High Byte