Delta Electronics Programmable Logic Controller DVP-PLC - Manual (Page 314)

7 Application Instructions API 50-99
D V P - P L C A P P L I C AT I O N M A N U A L 7-30
D1229: (EH2/SV) Phase setting of CH2 (Y4, Y5): D1229 determines the phase by the last two bits; other
bits are invalid.
1. K0: Y4 output
2. K1: Y4, Y5 AB-phase output; A ahead of B.
3. K2: Y4, Y5 AB-phase output; B ahead of A.
4. K3: Y5 output
D1230: (EH2/SV) Phase setting of CH3 (Y6, Y7): D1230 determines the phase by the last two bits; other
bits are invalid.
1. K0: Y6 output
2. K1: Y6, Y7 AB-phase output; A ahead of B.
3. K2: Y6, Y7 AB-phase output; B ahead of A.
4. K3: Y7 output
D1328: (EH/EH2/SV) Low word of the number of CH0 offset pulses
D1329: (EH/EH2/SV) High word of the number of CH0 offset pulses
D1330: (EH/EH2/SV) Low word of the number of CH1 offset pulses
D1331: (EH/EH2/SV) High word of the number of CH1 offset pulses
D1332: (EH/EH2/SV) Low word of the number of remaining pulses at CH0
D1333: (EH/EH2/SV) High word of the number of remaining pulses at CH0
D1334: (EH/EH2/SV) Low word of the number of remaining pulses at CH1
D1335: (EH/EH2/SV) High word of the number of remaining pulses at CH1
D1336: (EH/EH2/SV) Low word of the current number of output pulses at CH0
D1337: (EH/EH2/SV) High word of the current number of output pulses at CH0
D1338: (EH/EH2/SV) Low word of the current number of output pulses at CH1
D1339: (EH/EH2/SV) High word of the current number of output pulses at CH1
D1375: (EH2/SV) Low word of the current number of output pulses at CH2
D1376: (EH2/SV) High word of the current number of output pulses at CH2
D1377: (EH2/SV) Low word of the current number of output pulses at CH3
D1378: (EH2/SV) High word of the current number of output pulses at CH3
D1344: (EH/EH2/SV) Low word of the number of compensation pulses at CH0
D1345: (EH/EH2/SV) High word of the number of compensation pulses at CH0
D1346: (EH/EH2/SV) Low word of the number of compensation pulses at CH1
D1347: (EH/EH2/SV) High word of the number of compensation pulses at CH1
4. When there are many high speed output instructions (PLSY, PWM, PLSR) for Y0 output in a program, PLC will
only execute the settings and outputs of the instruction that is first enabled.
5. More explanations on M1347 and M1348:
If M1347 and M1348 is enabled, and when the execution of PLSY instruction has been completed, M1347/M1348
will be reset automatically, i.e. you do not have to turn the status of the drive contact from Off to On before PLSY
instruction and when PLC scans to the instruction (assume the drive contact of the instruction is True), there will
still be pulse output. PLC detects the status of M1347 and M1348 when END instruction is being executed.
Therefore, when the pulse output is completed and if PLSY instruction is a continuous execution one, there will be
a scan time of delay in the next string of pulse output.