Renesas SH7641 - Manual (Page 981)

Section 25 Electrical Characteristics
Rev. 4.00 Sep. 14, 2005 Page 931 of 982
REJ09B0023-0400
Tm1
t
AD1
t
CSD1
Tmd1w Tmd1
t
AD1
t
RWD1
t
FMD
t
WDD1
t
FMD
t
FMD
t
RWD1
t
CSD1
CKIO
A25 to A0
CS6B
RD/ WR
D31 to D0
D31 to D0
Read
BS
FRAME
WAIT
WEn
RD
Write
t
WDH1
t
WDD1
t
RDS2
t
WDD1
t
BSD
t
DACD
t
DACD
t
WTH1
t
WTS1
t
BSD
t
WDH1 t
WDH1
t
RDH2
Note: * Waveform for DACKn and TENDn when active low is selected.
DACKn,
TENDn*
Figure 25.19 Burst MPX-IO Interface Bus Cycle Single Read Write
(One Address Cycle, One Software Wait)