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Renesas SH7641 User Manual

Page 48

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Rev. 4.00 Sep. 14, 2005 Page xlviii of l

Table 18.27

Output Level Select Function ........................................................................... 558

Table 18.28

Output level Select Function............................................................................. 560

Table 18.29

Register Combinations in Buffer Operation ..................................................... 571

Table 18.30

Cascaded Combinations.................................................................................... 574

Table 18.31

PWM Output Registers and Output Pins .......................................................... 577

Table 18.32

Phase Counting Mode Clock Input Pins ........................................................... 581

Table 18.33

Up/Down-Count Conditions in Phase Counting Mode 1.................................. 583

Table 18.34

Up/Down-Count Conditions in Phase Counting Mode 2.................................. 584

Table 18.35

Up/Down-Count Conditions in Phase Counting Mode 3.................................. 585

Table 18.36

Up/Down-Count Conditions in Phase Counting Mode 4.................................. 586

Table 18.37

Output Pins for Reset-Synchronized PWM Mode ............................................ 588

Table 18.38

Register Settings for Reset-Synchronized PWM Mode.................................... 588

Table 18.39

Output Pins for Complementary PWM Mode .................................................. 591

Table 18.40

Register Settings for Complementary PWM Mode .......................................... 592

Table 18.41

Registers and Counters Requiring Initialization ............................................... 598

Table 18.42

MTU Interrupts................................................................................................. 617

Table 18.43

Mode Transition Combinations ........................................................................ 642

Table 18.44

Pin Configuration.............................................................................................. 675

Table 18.45

Pin Combinations.............................................................................................. 675

Section 19 Serial Communication Interface with FIFO (SCIF)
Table 19.1

SCIF Pins.............................................................................................................. 688

Table 19.2

SCSMR Settings ................................................................................................... 707

Table 19.3

Bit Rates and SCBRR Settings in Asynchronous Mode....................................... 708

Table 19.4

Bit Rates and SCBRR Settings in Synchronous Mode ......................................... 711

Table 19.5

Maximum Bit Rates for Various Frequencies with

Baud Rate Generator (Asynchronous Mode)........................................................ 712

Table 19.6

Maximum Bit Rates with External Clock Input (Asynchronous Mode)............... 713

Table 19.7

Maximum Bit Rates with External Clock Input (Synchronous Mode) ................. 713

Table 19.8

SCSMR Settings and SCIF Communication Formats .......................................... 722

Table 19.9

SCSMR and SCSCR Settings and SCIF Clock Source Selection......................... 722

Table 19.10

Serial Communication Formats (Asynchronous Mode).................................... 724

Table 19.11

SCIF Interrupt Sources ..................................................................................... 743

Section 20 USB Function Module
Table 20.1

Pin Configuration and Functions .......................................................................... 748

Table 20.2

Command Decoding on Application Side ............................................................ 779

Section 21 A/D Converter
Table 21.1

A/D Converter Pins............................................................................................... 799

Table 21.2

Analog Input Channels and A/D Data Registers................................................... 801

Table 21.3

A/D Conversion Time (Single Mode)................................................................... 811

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