Renesas SH7641 - Manual (Page 847)

Section 21 A/D Converter
Rev. 4.00 Sep. 14, 2005 Page 797 of 982
REJ09B0023-0400
Section 21 A/D Converter
This LSI includes a 10-bit successive-approximation A/D converter allowing selection of up to
eight analog input channels.
The A/D converter is composed of two independent modules, A/D0 and A/D1.
21.1 Features
A/D converter features are listed below.
• 10-bit resolution
• Eight input channels (4 channels × 2)
• High-speed conversion
 Conversion time: maximum 4.4 µs per channel (in single mode, 146-state conversion
(Typ.), P
φ = 33 MHz operation)
• Three conversion modes
 Single mode: A/D conversion on one channel
 Multi mode: A/D conversion on one to four channels
 Scan mode: Continuous A/D conversion on one to four channels
• Conversion can be carried out simultaneously on two channels.
• Two conversion start methods
 Software or timer conversion start trigger (MTU) can be selected
• Eight 16-bit data registers
 A/D conversion results are transferred for storage into 16-bit data registers corresponding
to the channels.
• Sample-and-hold function
• A/D interrupt requested at the end of conversion
 An A/D conversion end interrupt (ADI0, ADI1) request can be generated on completion of
A/D conversion.
 The DMAC can be activated by A/D conversion end.