Renesas SH7641 - Manual (Page 904)

Section 23 I/O Ports
Rev. 4.00 Sep. 14, 2005 Page 854 of 982
REJ09B0023-0400
23.6.1 Register Description
Port F has the following register.
• Port F data register (PFDR)
23.6.2 Port F Data Register (PFDR)
PFDR is a 16-bit readable/writable register that stores data for pins PTF15 to PTF0. PFDR is
initialized to H'0000 by a power-on reset, but it retains its previous value by a manual reset, in
standby mode, or in sleep mode.
Bit Bit Name
Initial
Value R/W
Description
15 PF15DT 0 R/W
14 PF14DT 0 R/W
13 PF13DT 0 R/W
12 PF12DT 0 R/W
11 PF11DT 0 R/W
10 PF10DT 0 R/W
9 PF9DT 0 R/W
8 PF8DT 0 R/W
7 PF7DT 0 R
6 PF6DT 0 R
5 PF5DT 0 R/W
4 PF4DT 0 R/W
3 PF3DT 0 R/W
2 PF2DT 0 R/W
1 PF1DT 0 R/W
0 PF0DT 0 R/W
Bits PF15DT to PF0DT correspond to pins PTF15 to
PTF0. When the function is general input port, the
corresponding pin level is read by reading the port.
Tables 23.6 and 23.7 show the function of PFDR.