Renesas SH7641 - Manual (Page 60)

Section 1 Overview
Rev. 4.00 Sep. 14, 2005 Page 10 of 828
REJ09B0023-0400
No.
(BGA256) Pin
Name Description
J1 DPLS/PTB[8] USB D+ input from Receiver/Port B
K3 Vss Ground (0V)
K2 A18 Address bus
K4 Vcc Power supply (1.8V)
K1 A19/PTA[8] Address bus/Port A
L1 A20/PTA[9] Address bus/Port A
L4 A21/PTA[10] Address bus/Port A
M1 A22/PTA[11] Address bus/Port A
L3 A23/PTA[12] Address bus/Port A
L2 A24/PTA[13] Address bus/Port A
M4 VssQ Ground for I/O circuits (0V)
N1 AUDCK AUD clock
M3 VccQ Power supply for I/O circuits (3.3V)
M2 A25/PTA[14] Address bus/Port A
N4 AUDATA[0]/PTJ[8] AUD data/Port J
P1 AUDATA[1]/PTJ[9] AUD data/Port J
N3 AUDATA[2]/PTJ[10] AUD data/Port J
N2 AUDATA[3]/PTJ[11] AUD data/Port J
P4
AUDSYNC/PTJ[12]
AUD synchronized/Port J
R1 TCK Test clock
P3 TDI Test data input
T1 TDO Test data output
R4 TMS Test mode select
P2
TRST
Test reset
R3
NMI
Nonmaskable interrupt request
U1
IRQ0/PTJ[0]
External interrupt request/Port J
T4 Vcc Power supply (1.8V)
R2
IRQ1/PTJ[1]
External interrupt request/Port J
U4 Vss Ground (0V)
V1 VssQ Ground for I/O circuits (0V)
U2
IRQ2/PTJ[2]
External interrupt request/Port J