Renesas SH7641 - Manual (Page 378)

Section 12 Bus State Controller (BSC)
Rev. 4.00 Sep. 14, 2005 Page 328 of 982
REJ09B0023-0400
A16
A0
CS
OE
I/O7
I/O0
WE
••••
••••
••••
••••
A17
A1
CSn
RD
D15
D8
WE1
D7
D0
WE0
This LSI
128k × 8-bit
SRAM
••••
A16
A0
CS
OE
I/O7
I/O0
WE
•••• ••••
••••
••••
••••
••••
••••
••••
Figure 12.7 Example of 16-Bit Data-Width SRAM Connection
This LSI
128k × 8-bit
SRAM
A16
A0
CS
OE
I/O7
I/O0
WE
. . .
A16
A0
CSn
RD
D7
D0
WE0
. . .
. . . . . .
Figure 12.8 Example of 8-Bit Data-Width SRAM Connection