Renesas SH7641 - Manual (Page 652)

Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 602 of 982
REJ09B0023-0400
Initial Output in Complementary PWM Mode: In complementary PWM mode, the initial
output is determined by the setting of bits OLSN and OLSP in the timer output control register
(TOCR).
This initial output is the PWM pulse non-active level, and is output from when complementary
PWM mode is set with the timer mode register (TMDR) until TCNT_4 exceeds the value set in
the dead time register (TDDR). Figure 18.38 shows an example of the initial output in
complementary PWM mode.
An example of the waveform when the initial PWM duty value is smaller than the TDDR value is
shown in figure 18.39.
Timer output control register settings
OLSN bit: 0 (initial output: high; active level: low)
OLSP bit: 0 (initial output: high; active level: low)
TCNT3, 4 value
TGR4_A
TDDR
TCNT_3
TCNT_4
Initial output Dead time
Time
Active level
Active level
TCNT3, 4 count start
(TSTR setting) Complementary
PWM mode
(TMDR setting)
Positive phase
output
Negative phase
output
Figure 18.38 Example of Initial Output in Complementary PWM Mode (1)