Renesas SH7641 - Manual (Page 10)

Rev. 4.00 Sep. 14, 2005 Page x of l
Abbreviations
ADC Analog to digital converter
ALU Arithmetic logic unit
bpp bits per pixel
bps bits per second
BSC Bus state controller
CODEC Coder-decoder
CPG Clock pulse generator
CPU Central processing unit
CRC Cyclic redundancy check
DMAC Direct memory access controller
DSP Digital signal processor
ESD Electrostatic discharge
ECC Error checking and correction
etu Elementary time unit
FIFO First-in first-out
Hi-Z High impedance
H-UDI User debugging interface
INTC Interrupt controller
LSB Least significant bit
MSB Most significant bit
PC Program counter
PFC Pin function controller
PLL Phase locked loop
RAM Random access memory
RISC Reduced instruction set computer
ROM Read only memory
SCIF Serial communication interface with FIFO
SOF Start of frame
TAP Test access port
T.B.D To be determined
UBC User break controller