Renesas SH7641 - Manual (Page 166)

Section 3 DSP Operation
Rev. 4.00 Sep. 14, 2005 Page 116 of 982
REJ09B0023-0400
0
Destination
ALU
DSR
Cleared
GT Z N V DC
H'00008000
39 31 0
Source 1 or 2
Addition
Guard
Guard
39 31
Figure 3.12 Rounding Operation Flow
0
H'00 0002
H'00 0001
H'00 0001 8000 H'00 0002 0000 H'00 0002 8000
Rounded result
Analog value
True value
Figure 3.13 Definition of Rounding Operation
Table 3.10 Variation of Rounding Operation
Mnemonic Function Source 1 Source 2 Destination
PRND Rounding Sx  Dz
 Sy Dz
Overflow Protection: The S bit in SR is effective for any rounding operations in the DSP unit.
See section 3.1.8, Overflow Protection, for details.